- Highly optimised with a powerful and flexible FPGA-based engine
- Achieves maximum efficiency by avoiding unnecessary data movements and CPU processing
Xilinx has announced the Alveo™ U25 SmartNIC, a platform that effectively merges network, storage and computes acceleration functions on a single device. It provides great efficiency and lowers total cost of ownership (TCO) of SmartNICs to cloud service providers, telecom operators and private cloud data centre operators that are facing rising networking demands and costs. The platform addresses current challenges relating to SDN, virtual switching, NFV, NVMe-oF, electronic trading, AI inference, video transcoding, and data analytics.
The U25 combines a highly optimised SmartNIC platform with a powerful and flexible FPGA-based engine that supports full programmability and turnkey accelerated applications.
“The SmartNIC market is forecast to surpass US$ 600M and comprise 23 per cent of the worldwide Ethernet adapter market by 2024,” according to Baron Fung, research director at Dell’Oro Group. “As cloud service providers scale capacity upwards, they are increasing their deployment of SmartNICs to free up valuable CPU cores for business applications, optimizing server utilization. The telco service providers, another market with strong growth potential, are looking to integrate SmartNICs from the core to the edge of the network for applications such as NFV and AI inferencing. FPGA-based SmartNICs such as the Alveo U25 are well-positioned to address this growing market opportunity.”
Powerful than SoC-based NICs
With the increase of network port speeds, cloud service providers, telcos and private cloud data centre operators are facing networking challenges and costs. The Alveo U25 SmartNIC platform focusses on removing these obstacles by providing true plug-and-play capabilities that make SmartNICs accessible for more widespread deployments.
Powered by Xilinx’s FPGA technology, the Alveo U25 SmartNIC provides higher throughput that is more powerful than SoC-based NICs. This allows cloud architects to deploy a wide range of functions and applications quickly. The platform enables ‘bump-in-the-wire’ network, storage, and compute offload and acceleration functions for maximum efficiency by avoiding unnecessary data movements and CPU processing. This dramatically reduces the CPU burden and reclaims resources to run more applications.
Embedded ARM processors provide unique processing to support emerging bare metal server use cases. The baseline NIC delivers ultra-high throughput, small packet performance and low-latency. Standard full-featured NIC functionality and drivers, including Onload® application acceleration software, can reduce latency up to 80 per cent and improve transmission control protocol (TCP)-based server application efficiency by up to 400 per cent in cloud-based applications.
“Today’s cloud infrastructures suffer from critical data bottlenecks caused by server I/O,” said Donna Yasay, vice president of marketing, Data Center Group at Xilinx. “With up to 30 per cent of data centre compute resources allocated for networking I/O processing, overhead continues to grow along with CPU cores. Xilinx is addressing the challenges resulting from the increased demands on networking by providing an easier to deploy SmartNIC with turnkey accelerated applications and out-of-the-box capabilities that go far beyond fundamental networking.”
Supports turnkey applications from various software vendors
The Alveo U25 SmartNIC platform enables turnkey accelerated applications that make it easier for non-tier-1 cloud data centre operators to deploy SmartNICs and quickly. The U25 SmartNIC supports turnkey applications from both Xilinx and independent software vendors. The programming model supports high-level network programming abstractions such as HLS and P4, as well as compute acceleration frameworks such as the Vitis™ unified software platform to enable Xilinx and third party accelerated applications.
The Alveo U25 SmartNIC supports Open vSwitch (OVS) offload and acceleration. The plug-and-play solution offloads over 90 per cent of OVS processing from the server to improve packet throughput by over 5x. Future turnkey solutions from Xilinx are planned for security functions such as IPSec, SSL/TLS, AES-256/128, and distributed firewall as well as AI inference acceleration.
First OCP 3.0 Ethernet Adapter and OCP Accelerator Module
Additionally, Xilinx announced a 10/25Gb Ethernet adaptor card, XtremeScale™ X2562 in the Open Compute Project (OCP) Spec 3.0 form factor for the world’s first FPGA-based OCP Accelerator Module (OAM).
Designed for high-performance electronic trading environments and enterprise data centres, the X2562 features sub-microsecond latency and high throughput with ultra-scale connectivity for real-time packet and flow information to thousands of virtual NICs. The X2562 is currently sampling and will be generally available in the second calendar quarter of 2020.
Also, Xilinx announced an FPGA-based Open Compute Accelerator Module (OAM). Based on the Xilinx® UltraScale+™ VU37P FPGA with 8GB of HBM memory and compliant with Open Accelerator Infrastructure (OAI), the card supports seven 25Gbps x8 links to enable rich inter-module system topologies for distributed acceleration.
The Alveo U25 SmartNIC is expected to be available in the third calendar quarter of 2020.