Using Low Dropout Regulators For Consumer Electronics

By Andy Keeseok Chang

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To keep up with recent demands for linear regulators in consumer electronic equipment, overall performance of low dropout regulators (LDO) regulators, such as power conversion performance, additional functions to adapt themselves into consumer electronics easily and reliability are being closely examined and proven

Various kinds of integrated circuits (ICs) are now indispensable components in almost all fields of the present human life. Consequently, power management for these ICs is getting important for electronic devices, including consumer electronics, those for industrial applications, battery-powered electronics and many others that require a reliable and efficient power management solution.

Key requirements of power management are also quite obvious for consumer electronics, such as stable power delivery, less power consumption under various load conditions, low noise, less space, high reliability and so on. As a result, various power management ICs—such as linear regulators, DC-DC converters, power controllers and PMICs—have been developed and applied to meet the specific requirements of various application fields.

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Low dropout regulators (LDOs) are a simple, inexpensive power component to regulate output voltage powered from a higher voltage input. Advantages of these are easy-to-design power circuit and decent power quality. For most applications, performance index of LDOs, is simple and clear to understand and apply.

Dropout voltage

Linear regulators can be classified by standard linear regulators, low dropout linear regulators (LDOs) and ultra-low dropout linear regulators (ULDOs). The key difference among these is the dropout voltage characteristic that is required to maintain a regulated output voltage.

Dropout voltage is defined as the minimum input to output differential voltage at which output maintains regulation. As a viewpoint of power delivery, a linear regulator can be regarded as a variable resistor, as shown in Fig. 1.

Fig. 1: Operating concept of a linear regulator
Fig. 1: Operating concept of a linear regulator

When IOUT is changed (R LOAD is changed), internal control circuitry of the linear regulator adjusts on-resistance of pass element. So, adjustable on-resistance range defines the operating maximum current range (operating output impedance range). For standard linear regulators, pass element is either a Darlington NPN or PNP output stage, and these have dropout voltages as high as 2V. This kind of linear regulators cannot be applied to applications that need lower dropout voltages, such as generating 3.3V from 3.6V battery power. To get lower dropout voltage characteristics, most LDOs/ULDOs use NMOSFET or PMOSFET of appropriate size as a pass element.

The important reason why the power circuit should pay attention to dropout voltage is power conversion efficiency. Lower dropout voltage performance of an LDO makes lower input voltage supply possible for the required output power delivery. This results in higher power conversion efficiency and lower heat occurrence problems due to power dissipation.

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Fig. 2 presents a comparison between power conversion characteristics with respect to dropout voltage performance of linear regulators. The presented three kinds of linear regulators need different minimum input voltage to get the same required output power. As shown in the figure, lower dropout voltage causes better power conversion efficiency, resulting in lower power dissipation.

Fig. 2: Power conversion characteristics with respect to dropout voltage
Fig. 2: Power conversion characteristics with respect to dropout voltage

Another advantage of lower power dissipation is lower heat occurrence that makes smaller package applications possible.

Pass elements

For ULDO regulators, PMOSFET or NMOSFET are used as the pass element. Their role is the same, but purpose of application is different. PMOSFET LDO has a typical LDO structure, as shown in Fig. 3(a). On-resistance performance (dropout voltage performance) is proportional to VSG and it needs higher VIN for better on-resistance performance. So, when output voltage is high, there is no problem in presenting good dropout performance.

Fig. 3: Block diagrams of PMOS LDO and NMOS LDO
Fig. 3: Block diagrams of PMOS LDO and NMOS LDO

However, as shown in Fig. 4(a), when output voltage gets low, dropout performance is restricted by minimum input voltage. So, PMOS LDO is suitable for relatively higher output voltage applications because dropout voltage becomes [VIN,MIN – VOUT] when output voltage is smaller than [VIN,MIN – VDROPOUT, Typical].

Fig. 4: Optimum operating range of ULDO
Fig. 4: Optimum operating range of ULDO

For example, for PMOS LDO with 0.5V of VDROPOUT typical and 2.5V of minimum input voltage, dropout voltage will be 0.5V, and VIN should be higher than 3.0V when VOUT=2.5V. But for VOUT=1.2V, VIN cannot be lower than 2.5V because minimum input voltage for internal circuit is 2.5V. As a result, dropout voltage in this case is limited as 1.3V(=2.5V-1.2V) even though typical dropout voltage specification is 0.5V.

NMOSFET LDO has a different operating mechanism to overcome the restriction of low voltage conversion performance of PMOS LDO. The typical block diagram is shown in Fig. 3(b), and on-resistance performance is also proportional to VIN, resulting in high VGS, but VGS can be changed depending on VOUT.

So, NMOS LDO has independent voltage supply VBIAS for the internal circuit to remove VIN restriction in dropout voltage performance when output voltage is low. As shown in Fig. 4(b), it maintains low dropout voltage performance even though output voltage is low. It means that VIN can be [VOUT+VDROPOUT] without any minimum input voltage restriction like PMOS LDO.

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The disadvantage of NMOS LDO is the existence of VBIAS, the power supply for internal control circuit. To make NMOS pass element have appropriate on-resistance, VBIAS is higher (generally 3VT) than VOUT. Now, NMOS LDO has maximum VBIAS restriction because of maximum operating rating of VBIAS pin.

When VOUT is getting higher, VBIAS should also be getting higher to make NMOS pass element have suitable on-resistance. But, unfortunately, maximum allowable voltage is restricted by fabrication process. So, due to maximum VBIAS voltage restriction, maximum output voltage performance is restricted by VBIAS rating. As a result, we can conclude that PMOS LDO is suitable for relatively higher output voltage applications, whereas NMOS LDO is suitable for low voltage to low voltage conversions, as shown in Fig. 4. This means that stability and reliability of the power circuit depend not only on component performance but also on proper selection of components.

Additional functions: soft start, power-good and auto-discharge

General protection functions such as output over-current protection (OCP) and over-temperature protection (OTP) are the typical protection functions of recent LDO products, as shown in Fig. 5. Besides protection functions as OCP or OTP, demand for additional functions has been rising recently in various application fields including consumer electronics.

Fig. 5: Simple block diagram of LDO regulator
Fig. 5: Simple block diagram of LDO regulator

First common demand for a linear regulator in recent consumer electronics is soft start function. When an electronic system starts up, power supply voltage ramps up to a certain pre-defined voltage with a certain ramp rate (rise time). As power supply voltage rises, an inrush current flows into uncharged I/O capacitors.

The major problem of inrush current is that it exceeds absolute maximum current rating of applied components on the power rail. All components on the PCB have a specific current rating, which, if exceeded, could cause damage to these components. Likewise, all PCB traces are designed with a certain current-carrying capability in mind and are also at risk of damage.

When designing PCB traces and selecting components, not taking inrush current peak into account can damage the power path and lead to system failure; however, appropriately designing for a large inrush current peak will lead to increase in size and cost.

In viewpoint of linear voltage regulator, as presented in Fig. 5, inrush current can be reduced by increasing voltage rise time on load capacitance and slowing down the rate at which capacitors charge by applying internal soft start circuit and/or programmable soft start circuit.

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Fig. 6 presents programmable soft start of the linear regulator by applying external soft start timing capacitor. With this feature, rise time can be programmed as per system requirement, as shown in Fig. 7, thereby reducing inrush current to ensure system stability.

Fig. 6: Application circuit of the external programmable soft start
Fig. 6: Application circuit of the external programmable soft start
Fig. 7: Rise time of LDO with respect to external Css
Fig. 7: Rise time of LDO with respect to external Css

PowerGood output is used as the power-on indicator to the load circuit. This signal indicates when output voltage is suitable for reliable operation of the load circuit. PowerGood output is pulled up or down with respect to voltage level of output voltage.

Nowadays, PowerGood signal is used not only for output power-on indication but also for automatic power sequence. Fig. 8 presents an application example of PowerGood signal for power sequencing. When main powers (VIN1 and VIN2) are applied, LDOs are ready to operate. After getting enable signal for the first LDO, the first LDO starts up and VOUT1 ramps up.

Fig. 8: Application example of PowerGood signal for power sequencing
Fig. 8: Application example of PowerGood signal for power sequencing

The internal PowerGood circuit monitors output voltage level of VOUT1, and pulls up VPG1 signal when output voltage VOUT1 reaches the predefined voltage level. Then, this pulled-up VPG1 signal can be an enable signal of the second LDO, resulting in automatic power sequence between the first and second LDO. Power sequence delay time (enable delay time) is easily programmed by an external RC delay circuit.

As a result, it is quite easy to get the automatic power sequence timing diagram, as shown in Fig. 9. The complex power sequence as shown in the figure can be easily designed by simple wiring done using PowerGood signal, which provides design convenience for most consumer electronics.

Fig. 9: Power sequence timing diagram of Fig. 8
Fig. 9: Power sequence timing diagram of Fig. 8

Another demand of recent LDOs for consumer electronics is auto-discharge function. When LDO is turning off, internal auto-discharge function provides discharge path of output load capacitors, which are used for a stable power supply. As shown in Fig. 10, output voltage turns down much faster with auto-discharge function, helping in quick operation of consumer electronics, because an internal discharge path is connected internally through the LDO.

Fig. 10: Power off discharge characteristics
Fig. 10: Power off discharge characteristics

High-performance, high-reliability CMOS ULDO products

To keep up with recent demands for linear regulators in consumer electronic equipment, overall performance of LDO regulators, such as power conversion performance, additional functions to adapt themselves into consumer electronics easily and reliability are being closely examined and proven.


Andy Keeseok Chang is vice president, TAEJIN Technology Co. Ltd

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