Designed for distribution and fanout of high-frequency clocks or low-frequency synchronization signals in either baseband or RF sections of wireless infrastructure radios
It is optimized to deliver very low phase noise clocks and precise, low-skew outputs, low device-to-device skew characteristics and fast output rise/fall times which help the system design achieve deterministic clock phase relationship across devices. and various core and output supply voltages are accommodated.
- Low phase noise floor: -160dBc/Hz (156.256MHz clock)
- Flexible input selection
- 1:8 Fanout modes
- Dual 1:4 Buffer fanout modes
- Supported clock frequency range: 0 to 3GHz
- Temperature range: -40°C to +105°C
- Core and output supply voltage modes:
- 3.3V core, 3.3V, 2.5V, and 1.8V output supply
- 2.5V core, 2.5V, and 1.8V output supply
Available in a 6 x 6 mm SMT package.