UltraSoC and Lauterbach have added support for the RISC-V open-source processor architecture in their universal SoC (system on chip) development and debug environment. The inclusion of RISC-V enables support of the industry’s major processor architectures and provides development tools for designers of heterogeneous systems that want to employ CPUs from multiple vendors.
UltraSoC and Lauterbach RISC-V collaboration furthers vendor-neutral debug and development environment
The combination of UltraSoC’s recently announced processor trace solution for RISC-V and Lauterbach’s TRACE32 suite gives RISC-V developers access to powerful debug, trace and logic analyzer tools that speed development and produce the better overall quality of results.
Rupert Baines, CEO of UltraSoC added: “Across the industry, there is rising excitement about the emergence of RISC-V as an open source processor. This is especially significant in heterogeneous multi-core architectures: engineers want the choice to ‘mix and ‘match’ cores and freely choose the best design for each application. Many development tools are tied to a vendor, or only operate within a narrow silo. Lauterbach and UltraSoC share a vision of tools that support engineers across all of a system, and support all architectures consistently.”
UltraSoC and Lauterbach are exhibiting at Embedded World 2018 (Nürnberg, Germany, 27 February – 1 March).