New Reference Design To Quickly Develop 400 Gbps Network Equipment


Renesas announced a new reference design intended to shorten the development timeframe for search offload engine in 400 Gbps network equipment such as routers and switches, which are increasingly required with widespread adoption of IoT terminals and the migration to cloud computing.

The design features the Renesas NSE SoC R8A20686BG, which is capable of up to two billion packet search operations per second. In addition, the search SoC control IP and control software are also included which would otherwise require a substantial amount of time to develop.

Compared to conventional 400 Gbps network processing systems which consist of dedicated SoCs such as ASICs or network processors, the new reference design allows system manufacturers to quickly deploy 400 Gbps systems with substantially improved performance for routing and switching applications such as video traffic at endpoints, the firm notes.

Key components of the new reference design are a network search engine evaluation board and a Xilinx field-programmable gate array (FPGA) employing a search SoC control IP to simplify the integration of custom functions.

The new reference design comprises the following:

  • A VCU110 evaluation board populated with a Xilinx Virtex Ultrascale XCVU190-2FLGC2104E FPGA
  • A daughterboard populated with the Renesas NSE SoC that is connected directly to the Xilinx VCU110 via FMC connectors
  • System-level reference design data integrating the NSE SoC and Xilinx’s SDNet technology
  • Search SoC control IP and control software suite

The reference design combines high-speed packet search with the flexibility of SDNet packet processing technology from Xilinx, Inc., ensuring the design will be able to grow with the ever-changing network, the firm says.

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“Thanks to the close relationship with Renesas, both companies have been able to bring best of breed technology to solve customer challenges and deliver complete solutions for hardware, software, and IP,” said Gilles Garcia, Director of Communications Business at Xilinx. “Accelerating time to revenue is critical and the joint reference design is clearly driving this objective.

For further details, view the full Press release.



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