MAXimum Board Level Reliability With UBM-free Packaging


Altera in association with TSMC has announced that the new FPGA MAX10 will be packaged using UBM-free (Under Bump Metallisation-free) WLCSP (wafer-level chip scale package) technology which will allow 200% improvement in board level reliability compared to conventional WLCSP. Using this innovative technology Altera’s MAX 10 FPGA products is expected to deliver enhanced quality, reliability and integration. This approach results in achieving an extremely thin package height of less than 0.5mm (including solder ball) for applications where space is at a premium, such as sensor applications, small form-factor industrial equipment and portable electronics. While enabling a large die size envelope and high package I/O count, it is suitable for applications such as WLAN and PMICs. Copper routing capability and inductor performance are also said to be enhanced.


According to the Altera press release, “The MAX 10 FPGA products revolutionise non-volatile integration by delivering advanced processing capabilities in a single-chip, small-form-factor programmable logic device. Building upon the single-chip heritage of previous MAX device families, densities range from 2K – 50K logic elements (LEs), using either single or dual-core voltage supplies. The MAX 10 FPGA family encompasses both advanced small wafer scale packaging (3mm x 3mm) and high I/O pin count packages offerings. MAX 10 FPGA devices are not built on TSMC’s 55nm embedded NOR flash technology that enables instant-on functionality.”


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