Plunify and Tencent Cloud have teamed up to offer on-demand access to FPGA development tools, compute resources to alleviate workloads and optimize design performance.
Plunify announces the availability of the Plunify Cloud client in the Tencent Cloud field programmable gate array (FPGA) Ecosystem for designers.
Plunify Cloud client is an interface to the Xilinx Vivado design suite for on-demand development, optimization, testing and deployment of FPGA designs in the cloud.
The Tencent FPGA Cloud, a secure, reliable and high-performance cloud compute service provided by Tencent, provides FPGA designers with the tools and infrastructure needed to develop and optimize FPGA applications with design reuse, integration automation, parallel compilation and accelerated design closure capabilities.
According to the firm, by maximizing the parallelism and flexibility of cloud computing, the new offering will dramatically shorten turnaround times of compilation and optimization builds, lowering the upfront cost of development.
After installing the Plunify Cloud plugin, developers can directly click new buttons in the Vivado GUI to offload compute-intensive builds to the cloud.
“We are thrilled to help Tencent Cloud expand the FPGA ecosystem in the cloud by making it easier for developers to harness the high-performance compute resources and optimization technology they need for today’s applications,” says Plunify Vice President of Business Development Kirvy Teo. “Our partnership enables FPGA design teams in China to easily redeploy their development workflows in the cloud without complicated -setup and configuration.”
“We welcome Plunify to the Tencent FPGA Cloud Ecosystem,” remarks Eric Sha, director at Tencent Cloud Product Center. “Plunify’s Machine Learning engine enables a complete design optimization flow for developers in the Tencent FPGA Cloud. We are Plunify’s first cloud partner in China, and both will work together to expand the Tencent FPGA Cloud Ecosystem and provide a convenient, complete user experience to the FPGA community.”